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Intel Re-architects HPC Life Force


Intel has announced details for its next-generation Xeon Phi processors (code-named Knights Landing), which promise to champion "code modernization" investments.

"Xeon Phi feature a new high-speed fabric that will be integrated on-package and high-bandwidth, on-package memory that combined, promise to accelerate the rate of scientific discovery. Currently, memory and fabrics are available as discrete components in servers limiting the performance and density of supercomputers," says Intel.

The new interconnect technology, called Intel Omni Scale Fabric, is designed to address the requirements of the next generations of high-performance computing. Intel Omni Scale Fabric will be integrated in the next generation of Intel Xeon Phi processors as well as future general-purpose Intel Xeon processors.

This integration, along with the fabric's HPC-optimized architecture, is designed to address the performance, scalability, reliability, power, and density requirements of future HPC deployments.

"Intel is re-architecting the fundamental building block of HPC systems by integrating the Intel Omni Scale Fabric into Knights Landing, marking a significant inflection and milestone for the HPC industry,” said Charles Wuischpard, vice president and general manager of Workstations and HPC at Intel.

"Knights Landing will be the first true many-core processor to address today's memory and I/O performance challenges. It will allow programmers to leverage existing code and standard programming models to achieve significant performance gains on a wide set of applications. Its platform design, programming model, and balanced performance make it the first viable step towards exascale."

Programming Complexities and Bandwidth Bottlenecks

Knights Landing will be available as a standalone processor mounted directly on the motherboard socket in addition to the PCIe-based card option. The socketed option removes (says Intel) "programming complexities and bandwidth bottlenecks" of data transfer over PCIe, common in GPU and accelerator solutions. Knights Landing will include up to16 GB high-bandwidth, on-package memory at launch — designed in partnership with Micron — to deliver five times better bandwidth compared to DDR4 memory, five times better energy efficiency, and three times more density than current GDDR-based memory.

When combined with integrated Intel Omni Scale Fabric, the new memory solution will allow Knights Landing to be installed as an independent compute building block. Powered by more than 60 HPC-enhanced Silvermont architecture-based cores, Knights Landing is expected to deliver more than 3 TFLOPS of double-precision performance and three times the single-threaded performance compared with the current generation.

Knights Landing will be binary-compatible with Intel Xeon processors, making it easy for software developers to reuse plenty of existing code.


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