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Java Apps on the Raspberry Pi

May 21, 2013

Here is an update on my ongoing project, where I use Java on a Raspberry Pi to control an Arduino, which in turn will control some other electrical device

Channel: JVM Languages

Expanding VTACH

May 20, 2013

The last few weeks, I've been building vtach — a Verilog implementation of CARDIAC, the old paper-based demonstration computer from Bell Labs.

Aliasing Is Particularly Troublesome With Vector Elements

May 17, 2013

I would like to continue our discussion with a particularly nasty case in which the result is not well defined.

Channel: C/C++

Troubleshooting Verilog

May 12, 2013

I want to squash a bug as a way to show how you "debug" Verilog hardware designs (or, at least, one way to do so)

Some Subtleties of Aliasing

May 09, 2013

Aliasing can cause paradoxical behavior.

Channel: C/C++

The CPU Crawl

May 08, 2013

I want to talk a bit more about Verilog and how it is different from simply writing something using software.

Sometimes, Making a Program Clearer Makes It Faster

May 02, 2013

We can "optimize" our code by removing requests for operations that our data structures do not really need to support.

Channel: C/C++

The Heart of a CPU

Apr 28, 2013

A paper computer is certainly novel, and the spreadsheet version lets students get familiar with the architecture without having to write on cardboard. I wanted to go further, though.

Some Optimizations Are No-Brainers

Apr 26, 2013

Kernighan's rule for optimizations (Don't do it) is good advice. But as with most rules, there are exceptions.

Channel: C/C++

CPU Design on Paper

Apr 23, 2013

FPGAs are great for experimenting with CPU designs.



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