Does your CPU support AES extensions? Does your Intel multicore CPU include support for FMA extensions using YMM state? Do all the Intel multicore CPUs that have to execute your software support Intel hardware-assisted virtualization? Is Intel Hyper-Threading enabled? The newest version of CoreInfo provides a detailed summary of all the instructions sets that the CPUs found on the system support. Previous versions of CoreInfo were very useful to discover the NUMA (short for Non-Uniform Memory Access) nodes, groups, sockets, and all the cache levels. However, the newest version provides a lot of extra information compared to the previous versions, and therefore, this simple Windows command-line utility becomes more useful for developers.
I usually find CoreInfo really useful to gather information about the underlying hardware before running benchmarks and performance tests for parallelized algorithms in computers with NUMA architectures. The additional information added in the latest versions provides most of the things you need to know about the hardware in which you are running parallelized code. Because it's a simple command-line utility, you can easily run it with the desired parameter to gather the necessary information and save the results in a text file.
By default, when you run the CoreInfo executable file (coreinfo.exe) in the command-line on any modern Windows version, the utility will run with the new
-f option enabled. This option dumps information about all the instruction sets supported by each CPU that provides one or more hardware threads. However, you can specify the options you want to reduce the information about. It is not necessary to install CoreInfo, and therefore, you can start using it by just running the executable file and accepting the license. You just need to accept the license once.
The following lines provide an example of the results of running
CoreInfo -f in an old Intel Core 2 Duo P8600 mobile CPU. The first column displays the instruction set short name, the second column shows an asterisk (*) to indicate that the CPU supports that instruction set, and the third column provides a clear description for the instruction set. Of course, many modern Intel CPUs will display asterisks on most of the rows. Thus, I've chosen an old dual-core mobile CPU for the example.
Coreinfo v3.03 - Dump information on system CPU and memory topology Copyright (C) 2008-2012 Mark Russinovich Sysinternals - www.sysinternals.com Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz Intel64 Family 6 Model 23 Stepping 10, GenuineIntel HTT - Hyperthreading enabled HYPERVISOR - Hypervisor is present VMX * Supports Intel hardware-assisted virtualization SVM - Supports AMD hardware-assisted virtualization EM64T * Supports 64-bit mode SMX * Supports Intel trusted execution SKINIT - Supports AMD SKINIT EIST * Supports Enhanced Intel Speedstep NX * Supports no-execute page protection PAGE1GB - Supports 1 GB large pages PAE * Supports > 32-bit physical addresses PAT * Supports Page Attribute Table PSE * Supports 4 MB pages PSE36 * Supports > 32-bit address 4 MB pages PGE * Supports global bit in page tables SS * Supports bus snooping for cache operations VME * Supports Virtual-8086 mode FPU * Implements i387 floating point instructions MMX * Supports MMX instruction set MMXEXT - Implements AMD MMX extensions 3DNOW - Supports 3DNow! instructions 3DNOWEXT - Supports 3DNow! extension instructions SSE * Supports Streaming SIMD Extensions SSE2 * Supports Streaming SIMD Extensions 2 SSE3 * Supports Streaming SIMD Extensions 3 SSSE3 * Supports Supplemental SIMD Extensions 3 SSE4.1 * Supports Streaming SIMD Extensions 4.1 SSE4.2 - Supports Streaming SIMD Extensions 4.2 AES - Supports AES extensions AVX - Supports AVX intruction extensions FMA - Supports FMA extensions using YMM state MSR * Implements RDMSR/WRMSR instructions MTTR * Supports Memory Type Range Registers XSAVE * Supports XSAVE/XRSTOR instructions OSXSAVE * Supports XSETBV/XGETBV instructions CMOV * Supports CMOVcc instruction CLFSH * Supports CLFLUSH instruction CX8 * Supports compare and exchange 8-byte instructions CX16 * Supprots CMPXCHG16B instruction DCA - Supports prefetch from memory-mapped device F16C - Supports half-precision instruction FXSR * Supports FXSAVE/FXSTOR instructions FFXSR - Supports optimized FXSAVE/FSRSTOR instruction MONITOR * Supports MONITOR and MWAIT isntructions MOVBE - Supports MOVBE instruction PCLULDQ - Supports PCLMULDQ instruction POPCNT - Supports POPCNT instruction SEP * Supports fast system call instructions DE * Supports I/O breakpoints including CR4.DE DTES64 * Can write history of 64-bit branch addresses DS * Implements memory-resident debug buffer DS-CPL * Supports Debug Store feature with CPL PCID - Supports PCIDs and settable CR4.PCIDE PDCM * Supports Performance Capabilities MSR RDTSCP - Supports RDTSCP instruction TSC * Supports RDTSC instruction TSC-DEADLINE - Local APIC supports one-shot deadline timer TSC-INVARIANT - TSC runs at constant rate xTPR * Supports disabling task priority messages ACPI * Implements MSR for power management TM * Implements thermal monitor circuitry TM2 * Implements Thermal Monitor 2 control APIC * Implements software-accessible local APIC x2APIC - Supports x2APIC CNXT-ID - L1 data cache mode adaptive or BIOS MCE * Supports Machine Check, INT18 and CR4.MCE MCA * Implements Machine Check Architecture PBE * Supports use of FERR#/PBE# pin PSN - Implements 96-bit processor serial number
For example, the following line means that the CPU doesn't support Intel Hyper-Threading because the second column displays a dash (-):
HTT - Hyperthreading enabled
The following line means that the CPU supports Intel SSE4.1 because the second column displays an asterisk (*):
SSE4.1 * Supports Streaming SIMD Extensions 4.1
The information is very useful when you use libraries or your own parallelized code with many optimizations that take different SIMD instruction sets running in multiple cores. When you don't remember whether a CPU supports certain instructions, it is very useful to run the newest CoreInfo version. You don't need to check the CPU specifications or run additional utilities that might require installations.
If you're interested in the additional information that CoreInfo provides about multicore architectures and NUMA, you can read the post I wrote when Mark Russinovich, a member of Windows Sysinternals team, made Coreinfo 2.0 available for download.
You can download the latest version of CoreInfo here.