If you read my recent article about my custom CPU with one instruction , you probably figured out that even though the processor only knows about a move instruction, the assembler provides more common op codes (like JMP or CALL) and translates them into the appropriate move. The Maxim MAXQ (another single instruction computer) does the same thing. But the practice isn't just limited to one instruction machines.

 

Think about the popular Atmel AVR chip. Suppose it didn't have a shift left or rotate left instruction (it does, but play along with me for a minute). What would you do? Shifting left is the same as multiplying by two, but it would be wasteful to multiply just to get a shift. But in 3^rd grade you learned that 2x is the same as x+x, right? The AVR can do that. An ADD instruction is (in binary) 000011 RDDDDDRRRR (where R and D are bits showing which two registers to add together Rd=Rd+Rr).

Oh wait, the AVR does have a shift instruction called LSL. We'll just use that instead. Its opcode is: 000011 DDDDDDDDDD. Which is, of course, the same as an ADD where Rd==Rc! So the CPU apparently had 3^rd grade math also.

A rotate left, by the way, is the same as ADC R,R. So you do a shift and you add the carry bit. There are many similar examples throughout the CPU world. The SPARC ret instruction is the same as a jmpl instruction, for example. The NOP on the ARM CPU is actually a useless move instruction.

Shakespeare wrote, “That which we call a rose. By any other name would smell as sweet.” Apparently CPU and assembler designers agree.