New Xilinx ISE and Linux
Xilinx recently released version 13.1 of their ISE Webpack toolkit. If you haven't used ISE, its the tool that lets you build logic descriptions for FPGAs using schematics, Verilog, or VHDL. You can simulate your design or build bitstreams suitable for use with most of the Xilinx FPGA or CPLD products. I applaud Xilinx for making a Linux version available although I have often noted quirks on the Linux side that seem pretty fundamental.
This round, things seem to work pretty well, except for the core generator. The two things I have noticed is that browsing for a COE file in the memory generator crashes the core generator. I have to manually enter the file name. The other problem is that when the core generator completes, it prints out some sort of exception in the console and the xco file is NOT added to your project. It isn't hard to work around this -- you just have to manually include the file the core generator creates. However, its things like this that make the software creaky to use in Linux.
I don't know if its because I am using Ubuntu and they expect a different version or if its my 64-bit setup, or if it is just not tested well under Linux. On the other hand, at least they do provide a Linux version and it does work very well when it works. The simulator, in particular is much better than what I was using on the old 10.1 release.
If you've ever been interested in FPGA development, you should realize that you can download this free software (or the equivalent from other vendors such as Altera's Quartus software) and design and simulate with no investment in hardware at all. Hopefully, one day Linux will be the first platform EDA vendors target instead of a welcome afterthought.