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Implementing Firmware for Embedded Intel Architecture Systems


John C. MacInnis is a member of the Embedded and Communications Group at Intel. Courtesy Intel Corporation. All rights reserved.


Embedded systems using the Intel architecture must include a firmware stack that initializes CPU cores, memory, I/O, peripherals, graphics, and provides runtime support for operating systems. While Intel architecture-based PC designs typically use a full BIOS solution as a firmware stack, many embedded systems are designed with a more optimized firmware layer known as a boot loader. The job of the boot loader is to quickly initialize platform hardware and boot the system to an embedded real-time operating system (RTOS) or OS. Until recently, many embedded operating systems were designed to boot the device and enable all the drivers and networking on the board with no power management per se.

As Intel architecture expands into more differentiated types of embedded systems, power management becomes increasingly important both for saving electricity costs as well as maximizing battery life in mobile systems.

OS-directed Power Management (OSPM) using Advanced Configuration and Power Interface (ACPI) methodology provides an efficient power management option. For system developers, an ACPI design can help yield full PM control with quick time to market and cost savings. It offers flexibility by pushing state machine management and policy decisions to the OS and driver layer. The OS creates policy decisions based on system use, applications, and user preferences. From a maintenance and support perspective, patches, updates and bug fixes are better managed at the OS and driver layer than in the firmware.

A Note About Firmware Terminology: Since the first IBM clones in the early 1980s, the PC BIOS has been the predominant firmware layer in most of Intel architecture system designs commonly referred to as x86. It has been observed that many Embedded Intel Architecture product designers have unique requirements not always completely satisfied by the standard PC BIOS. This article uses the terms "firmware" and "boot loader" to denote the distinct differences between a PC BIOS and the hybrid firmware required for many of today's embedded systems.

Dynamic System Power Management

Many types of embedded systems built on Intel architecture are necessarily becoming more power-savvy. Implementing power management involves complex state machines that encompass every power domain in the system. Power domains can be thought of globally as the entire system, individual chips, or devices that can be controlled to minimize power use, as illustrated in Figure 1.

Figure 1: System power state diagram (Source: Intel Corporation, 2009)

Power and Thermal Management States

G0, G1, G2, and G3 signify global system states physically identifiable by the user

G3 -- Mechanical Off

G2 -- Soft Off

G1 -- Sleeping

G0 - Working

S0, S1, S2, S3, S4 signify different degrees of system sleep states invoked during G1.

D0, D1,…, Dn signify device sleep states. ACPI tables include device-specific methods to power down peripherals, while preserving Gx and Sx system states; for example, powering down a hard disk, dimming a display or powering down peripheral buses when they are not being used.

C0, C1, C2, C3, and C4 signify different levels of CPU sleep states. The presumption is that deeper sleep states save more power at the tradeoff cost of longer latency to return to full on.

P0, P1, P2,…, Pn signify CPU performance states while the system is on and the CPU is executing commands or in the C0 state.

T0, T1, T2,…, Tn signify CPU-throttled states while the CPU is in the P0 operational mode. Clock throttling is a technique used to reduce a clock duty cycle, which effectively reduces the active frequency of the CPU. The throttling technique is mostly used for thermal control. Throttling can also be used for things such as controlling fan speed. Figure 2 shows a basic conceptual diagram of a clock throttled to 50 percent duty cycle.

Figure 2: Clock throttling(Source: Intel Corporation, 2009)

Power Consumption and Battery Life

Power consumption is inversely related to performance, which is why a handheld media player can play 40 hours of music but only 8 hours of video. Playing video requires more devices to be powered on as well as computational CPU power. Since battery life is inversely proportional to system power draw, reducing power draw by 50 percent doubles the remaining battery life.

System PM Design Firmware: OS Cooperative Model;

In Intel architecture systems, the firmware has unique knowledge of the platform power capabilities and control mechanisms. From development cost and maintenance perspectives, it is desirable to maintain the state machine complexity and decision policies at the OS layer. The best approach for embedded systems using Intel architecture is for the firmware to support the embedded OS by passing up control information unique to the platform while maintaining the state machine and decision policies at the OS and driver layer. This design approach is known as "OS-directed power management" or OSPM.

Under OSPM, the OS directs all system and device power state transitions. Employing user preferences and knowledge of how devices are being used by applications, the OS puts devices in and out of low-power states. The OS uses platform information from the firmware to control power state transition in hardware. APCI methodology serves a key role in both standardizing the firmware to OS interface and optimizing power management and thermal control at the OS layer.

Figure 3: System power management development and operational phases (Source: Intel Corporation, 2009)


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